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Author, Editor(s)
Author(s):
Basin, David A.
Friedrich, Stefan
dblp
dblp

BibTeX cite key*:

BasinFriedrichVeritas

Title

Title*:

Modeling a Hardware Synthesis Methodology in Isabelle

Journal

Journal Title*:

Formal Methods in Systems Design

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Language:

English

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Name:


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ISSN:


Vol, No, pp, Date

Volume*:

15

Number:

2

Publishing Date:

September 1999

Pages*:

99-122

Number of
VG Pages:


Page Start:


Page End:


Sequence Number:


DOI:


Note, Abstract, ©

Note:


(LaTeX) Abstract:

Formal Synthesis is a methodology developed at Kent for
combining circuit design and verification, where a circuit is
constructed from a proof that it meets a given formal specification.
We have reinterpreted this methodology in Isabelle's theory of
higher-order logic so that circuits are incrementally built during
proofs using higher-order resolution. Our interpretation simplifies
and extends Formal Synthesis both conceptually and in implementation.
It also supports integration of this development style with other
proof-based synthesis methodologies and leads to techniques for
developing new classes of circuits, e.g., recursive descriptions of
parametric designs.

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Correlation
MPG Unit:
Max-Planck-Institut für Informatik
MPG Subunit:
Programming Logics Group
Audience:
experts only
Appearance:
MPII WWW Server, MPII FTP Server, MPG publications list, university publications list, working group publication list, Fachbeirat


BibTeX Entry:
@ARTICLE{BasinFriedrichVeritas,
AUTHOR = {Basin, David A. and Friedrich, Stefan},
TITLE = {Modeling a Hardware Synthesis Methodology in {I}sabelle},
JOURNAL = {Formal Methods in Systems Design},
YEAR = {1999},
NUMBER = {2},
VOLUME = {15},
PAGES = {99--122},
MONTH = {September},
}


Entry last modified by Christine Kiesel, 03/12/2010
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Editor(s)
Christine Kiesel
Created
03/30/2000 02:38:32 PM
Revisions
3.
2.
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Editor(s)
Christine Kiesel
Christine Kiesel
Anja Becker
Christine Kiesel
Edit Dates
14.05.2003 17:00:38
14.09.2001 03:36:30 PM
31.03.2000 13:50:00
30/03/2000 14:41:44